21 October 2011

Nur Ezani Duties and Tasks

My Position
I was assign in Information Technology department under supervision of Professor Park Sang Bong. My placed is at ITASIC Lab (409) in Digital Information Building

This is my place at ITASIC laboratory


Main Project
DESIGN THE DIGITAL LOGIC FOR TOUCH SENSOR CHIP USING VERILOG
this is a XManager Enterprise3 application used to create verilog code via VI editor
part of my code 1 via VI editor
part of my code 2  via VI editor
result after compile the code

This project still in progress. We have done 50 % progress


Sub Task
Conduct Verilog and MFC (Microsoft Foundation Class) seminar
Attend Korean for International student's class and JSP Web Progranning class

SEMINAR

Verilog Seminar
I was study about basic of Verilog by refer to Verilog HDL Synthesis A Practical Primer ( J.Bhasker) and Verilog Hdl 2nd Edition (Samir Palnitkar) book given by Professor Park Sang Bong.




All my slide show during Verilog seminar

me during conduct Verilog seminar


MFC (Microsoft Foundation Class) Seminar

To conduct MFC seminar successfully, I was study via refering to http://msdn.microsoft.com and get help from ITASIC team mate
Microsoft Studio 2010 to write MFC code
ChildView.cpp
TouchPad.cpp 
Stroke.cpp 
stdafx.cpp 
MainFrm.cpp


CLASS

Korean for International (Language) Class
I learnt a few basic language like Chinese, Japanese, Korean, English and Bahasa Malaysia.
me during answer language class mid exam


JSP Web Programming Class

I also registered to JSP class. I learnt to develop JSP web page using Java EE via Eclipse



Others Activities

Till then..see you on the next entry..^_^

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